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Samsung 8LPU+ Process: A Switch 2 Lite SoC Candidate?

Screenshot of the IEDM conference website: 3-6 | Advanced EUV-less 8nm technology platform for cost-effective edge AI applications Monday, December 14 4:20 PM - 4:45 PM PST This paper presents the 2nd-generation 8nm technology platform (8LPU+) tailored for cost-effective automotive and robotics applications. 8LPU+ achieves 12% performance enhancement, 15% power reduction, and 8% area shrink over the previous 8nm generation (8LPU), while reducing stand-by leakage through the introduction of ULL-SRAM and cHVT devices. For edge AI applications, where total chip size is governed not only by logic density but also by I/O and eNVM area, native 3.3V planar I/O devices are seamlessly integrated into the 8LPU FinFET platform, delivering additional ~10% I/O area reduction. 8LPU is fully qualified for automotive grade-1 (AG1) and offers AG1 eMRAM with an industry-leading bitcell size of 0.017 µm² (~20Mb/mm2), providing substantial eNVM area benefit. Together, these I/O and eMRAM area competitiveness establishes 8LPU as a highly area-competitive platform for edge AI applications such as AI MCU and automotive ZCU.

At the IEDM 2026 (International Electron Devices Meeting), Samsung is scheduled to present its 2nd-generation 8nm process 8LPU+:

• 12% performance enhancement
• 15% power reduction
• 8% area shrink
• ~10% I/O area reduction
• Stand-by leakage reduction

Electronic Times, a Korean press, quoted an unnamed industry source:

Existing 8nm customers in Samsung Foundry’s ecosystem, along with fabless chipmakers seeking automotive qualification, are likely candidates for the new 8LPU+ process

Is this Nvidia and Nintendo’s plan all along for a smaller, more efficient SoC suitable for the Switch 2 Lite?

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[Originally posted on 2026-10-21 Pacific Time]